Cloud TPUs

Google's custom AI accelerators - the hardware built around systolic-array matrix units for the compute-heavy math of training and inference.

• TPU system architecture - inside a TPU chip (TensorCore, MXUs, HBM, SparseCore, ICI), how chips scale into cubes, pods, and slices, Multislice across the DCN, and ICI resiliency.
• TPU overview - what a TPU is and how it runs AI workloads.
• TPU cloud architecture - how TPUs are delivered as compute: the TPU VM model, direct (SSH) vs managed (Agent Platform, GKE) access, and single / multi / sub-host scaling configurations.
• TPU hardware versions - the Cloud TPU family from v2 to v7e (Ironwood), what distinguishes each generation (topology, HBM, SparseCore, inference focus), and how to specify them.
• Consumption options - the "rental agreements" for TPU capacity: quota, Dynamic Workload Scheduler (flex start vs calendar), and long-term reservation vs on-demand vs spot.
• Selecting TPU software - the runtime (software) version each TPU VM boots into, how to set it in the CLI vs console, and the base versions to pick for PyTorch and JAX by TPU generation.
• GPU/TPU interoperability - choosing an accelerator with a GPU-or-TPU decision tree, then keeping one deployment portable across both with GKE custom compute classes and a dual-container vLLM pod that switches between TPU and GPU node pools.
• Use cases and case studies - the workloads TPUs are built for (foundation-model training, sparse recommendation systems, scientific computing) and the v5e / v5p / Trillium scaling architectures behind them.
• Model development best practices - designing models that keep the MXU busy: prioritize matrix ops, tile-friendly layouts, fixed tensor shapes to avoid recompiles, and TPU-friendly dimensions to minimize padding.
• Cheat sheet - one-page course review guide: TPU sweet spots, generation evolution, pod/slice/cube, consumption options, DWS, interoperability, and model-development principles.